Hi Jason,
For systems where the open-loop system is both stable and minimum-phase,
the usual tool for stability analysis is a Bode plot, used to check gain
and phase margins.
Minimum phase means several things (all equivalent):
1) That the phase of the transfer function has the least deviation from 0
degrees of all possible realizations of the TF which have the same
magnitude (the is the origin of the name "minimum phase")
2) That the inverse of the TF is also stable (same as saying that the TF
has no right-hand-plane ZEROS)
3) That the time domain step response is monotonic (the main characteristic
of non-minimum-phase systems is that their immediate response to a step is
in the opposite direction to the way it eventually responds)
Nyquist stability criterion (that is, based on a Nyquist plot and
encirclements of the -1 point, not to be confused with the simplified
Barkhausen Stability Criterion) is much more generally applicable than
gain/phase margin, but it is more difficult to verify for most practical
electronic circuits. Routh-Hurwitz is more applicable to analytical methods
where the transfer function is known exactly algebraically. Root locus is
mainly for situations where you have a parameter which you want to vary and
analyze the intervals of that parameter over which the system will be
stable.
You should be able to start with a Bode plot from the TL431 datasheet and
then draw a Bode plot for the rest of your open-loop system. Then you can
make the composite plot by adding the log magnitudes and adding the phases.
Finally you find the gain margin and phase margin and verify that both are
adequate.
Bear in mind that a transistor used in an application like this is often
quite non-linear if the range of operating current is allowed to vary over
several orders of magnitude. This is often an issue at the very low end of
the current range since the transconductance and the output impedance (at
the emitter) is inversely proportional to emitter current. If you can keep
the minimum current at some reasonable limit it will likely allow you to
just analyze stability for that one condition (where the transistor will
cause the most lag in combination with the output capacitance). Don't
forget to include the possible range of downstream capacitance on the
output, too. The absolute max capacitance may not be the worst case if it
is very large (and creates a dominant pole).
Sean
On Mon, Aug 17, 2020 at 5:30 PM Jason White <
[hidden email]> wrote:
> Hi everyone,
>
> I'd like to confirm the procedure to do stability analysis on a TL431
> series regulator. I'm a little rusty and I find writing this out is helpful
> even if I don't get many responses.
>
> I have attached a schematic of the circuit in question. The voltage at the
> base of a large NPN transistor is controlled by a TL431 using voltage
> feedback. I have three capacitors - I suspect C1 and C3 are probably
> "useful" for obtaining a stable system and C2 is probably "useless" except
> for arbitrarily decreasing the bandwidth and regulation performance.
>
> Steps:
> 1. (I think) The first step would be to guess the small signal transfer
> function poles and zeros of the TL431 from the datasheet graphs.
> 2. then determine the NPN transistor's transfer function
> 3. analyze the circuit to identify the characteristic equation
> 4. check the characteristic equation satisfies the Nyquist Stability
> Criteria (or Routh/Hurwitz/Root Locus)
>
> Thanks,
> Jason White
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